The Problem Space
Debugging and analyzing low-level assembly instruction execution requires transparent visualization of register banks, program counters, and memory stack frames without vendor-locked simulator overhead.
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RISC-V 32-bit Assembler & Simulator
From instruction to machine state.
High-efficiency 32-bit RISC-V instruction parser and assembler in Rust with a cycle-accurate Python execution simulator.
ISARISC-V 32-bit
AssemblerTwo-pass in Rust
SimulatorCycle-accurate Python
The Architecture & System
Engineered a two-pass assembler in Rust that validates syntax, calculates label offsets, and encodes instructions into binary machine code, coupled with a Python execution engine that models memory frames and arithmetic states.
Rust-based lexer, AST parser, and binary encoder producing raw machine binaries. Python simulator loading binary memory segments and maintaining architectural register states and call stack traces.
Key Technical Decisions
- Leveraged Rust's type system and pattern matching for rigorous instruction decoding and syntax error reporting.
- Architected an intermediate representation (IR) isolating assembly parsing from target microarchitecture layout.
- Implemented cycle-by-cycle memory stack frame tracking to debug recursive subroutines.